Add BSP layers for RISC-V boards

This adds two BSP layers for multiple RISC-V boards.
It enables development for SiFive and other boards.

Bug-AGL: SPEC-5111
Change-Id: I3f6c0617b443cd03122a5869b05a815926b264af
Signed-off-by: Jan-Simon Moeller <jsmoeller@linuxfoundation.org>

diff --git a/default-floating.xml b/default-floating.xml
index a4cf5ea..4b3e71a 100644 (file)
--- a/default-floating.xml
+++ b/default-floating.xml
@@ -82,4 +82,10 @@
   <project name="SanCloudLtd/meta-sancloud" path="bsp/meta-sancloud" remote="github" revision="kirkstone"/>
   <project name="EmbeddedAndroid/meta-rtlwifi" path="bsp/meta-rtlwifi" remote="github" revision="master"/>
 
+  <!-- meta-sifive -->
+  <project name="sifive/meta-sifive" path="bsp/meta-sifive" remote="github" revision="master"/>
+
+  <!-- meta-riscv for several risc boards -->
+  <project name="riscv/meta-riscv" path="bsp/meta-riscv" remote="github" revision="master"/>
+
 </manifest>

diff --git a/default.xml b/default.xml
index 1682fba..c478556 100644 (file)
--- a/default.xml
+++ b/default.xml
@@ -83,4 +83,10 @@
   <project name="SanCloudLtd/meta-sancloud" path="bsp/meta-sancloud" remote="github" revision="7eb9a421f547e347c9da23463734758568e13f95" upstream="kirkstone"/>
   <project name="EmbeddedAndroid/meta-rtlwifi" path="bsp/meta-rtlwifi" remote="github" revision="032a394e7569d1254cd17a0358475b986e64a5a4" upstream="master"/>
 
+  <!-- meta-sifive -->
+  <project name="sifive/meta-sifive" path="bsp/meta-sifive" remote="github" revision="b2678e67b079b4fb233bed4eb9b70a46b5bb06a7" upstream="master"/>
+
+  <!-- meta-riscv for several risc boards -->
+  <project name="riscv/meta-riscv" path="bsp/meta-riscv" remote="github" revision="c1c671a97025941f7ec4d98e586f357f126e9379" upstream="master"/>
+
 </manifest>