1 /************************************************************/
3 /* RelMain State transition model source file */
4 /* ZIPC Designer Version 1.2.0 */
5 /************************************************************/
6 #include "../ZST_include.h"
8 /* State management variable */
9 static uint8_t ZREL_RelMainState[ZREL_RELMAINSTATENOMAX];
11 static void ZREL_RelMains0StateEntry( void );
12 static void ZREL_RelMains1StateEntry( void );
13 static void ZREL_RelMains0e1( void );
14 static void ZREL_RelMains1e0( void );
15 static void ZREL_RelRestOffs0e0( void );
16 static void ZREL_RelRestOffs0e1( void );
17 static void ZREL_RelRestOffs0e8( void );
18 static void ZREL_RelRestOffs0e13( void );
19 static void ZREL_RelRestOffs1e1( void );
20 static void ZREL_RelRestOffs1e4( void );
21 static void ZREL_RelRestOffs2e15( void );
22 static void ZREL_RelRestOffs3e0( void );
23 static void ZREL_RelMains0Event( void );
24 static void ZREL_RelRestOffs0Event( void );
25 static void ZREL_RelRestOffs1Event( void );
26 static void ZREL_RelRestOffs2Event( void );
27 static void ZREL_RelRestOffs3Event( void );
28 static void ZREL_RelMains1Event( void );
29 static void ZREL_RelRestOns0Event( void );
31 /****************************************/
32 /* State start activity function */
34 /* State : restriction_mode_off( No 0 ) */
35 /****************************************/
36 static void ZREL_RelMains0StateEntry( void )
38 switch( ZREL_RelMainState[ZREL_RELMAINS0F] )
40 case ZREL_RELRESTOFFS0:
41 stm_rel_start_activity_none();
43 case ZREL_RELRESTOFFS1:
44 stm_rel_start_activity_restriction_normal();
46 case ZREL_RELRESTOFFS2:
47 stm_rel_start_activity_restriction_split_main();
49 case ZREL_RELRESTOFFS3:
50 stm_rel_start_activity_restriction_split_sub();
53 /*Not accessible to this else (default).*/
58 /****************************************/
59 /* State start activity function */
61 /* State : restriction_mode_2_on( No 1 ) */
62 /****************************************/
63 static void ZREL_RelMains1StateEntry( void )
65 switch( ZREL_RelMainState[ZREL_RELMAINS1F] )
67 case ZREL_RELRESTONS0:
68 stm_rel_start_activity_none();
71 /*Not accessible to this else (default).*/
76 /****************************************/
79 /* State : restriction_mode_off( No 0 ) */
80 /* Event : stt_restriction_mode_2_on( No 1 ) */
81 /****************************************/
82 static void ZREL_RelMains0e1( void )
84 ZREL_RelMainState[ZREL_RELMAIN] = ( uint8_t )ZREL_RELMAINS1;
85 ZREL_RelMainState[ZREL_RELMAINS1F] = ( uint8_t )ZREL_RELRESTONS0;
86 ZREL_RelMains1StateEntry();
89 /****************************************/
92 /* State : restriction_mode_2_on( No 1 ) */
93 /* Event : stt_restriction_mode_off( No 0 ) */
94 /****************************************/
95 static void ZREL_RelMains1e0( void )
97 ZREL_RelMainState[ZREL_RELMAIN] = ( uint8_t )ZREL_RELMAINS0;
98 ZREL_RelMains0StateEntry();
101 /****************************************/
102 /* Action function */
103 /* STM : RelRestOff */
104 /* State : none( No 0 ) */
105 /* Event : stt_crr_layer_apps_map_spl( No 0 ) */
106 /****************************************/
107 static void ZREL_RelRestOffs0e0( void )
109 ZREL_RelMainState[ZREL_RELMAINS0F] = ( uint8_t )ZREL_RELRESTOFFS3;
110 stm_rel_start_activity_restriction_split_sub();
113 /****************************************/
114 /* Action function */
115 /* STM : RelRestOff */
116 /* State : none( No 0 ) */
117 /* Event : stt_crr_layer_apps_spl_nml( No 1 ) */
118 /****************************************/
119 static void ZREL_RelRestOffs0e1( void )
121 ZREL_RelMainState[ZREL_RELMAINS0F] = ( uint8_t )ZREL_RELRESTOFFS1;
122 stm_rel_start_activity_restriction_normal();
125 /****************************************/
126 /* Action function */
127 /* STM : RelRestOff */
128 /* State : none( No 0 ) */
129 /* Event : ara_restriction_split_main( No 8 ) */
130 /****************************************/
131 static void ZREL_RelRestOffs0e8( void )
133 ZREL_RelMainState[ZREL_RELMAINS0F] = ( uint8_t )ZREL_RELRESTOFFS2;
134 stm_rel_start_activity_restriction_split_main();
137 /****************************************/
138 /* Action function */
139 /* STM : RelRestOff */
140 /* State : none( No 0 ) */
141 /* Event : stt_prv_layer_rst_none( No 13 ) */
142 /****************************************/
143 static void ZREL_RelRestOffs0e13( void )
145 stm_rel_start_activity_none();
148 /****************************************/
149 /* Action function */
150 /* STM : RelRestOff */
151 /* State : restriction_normal( No 1 ) */
152 /* Event : stt_crr_layer_apps_spl_nml( No 1 ) */
153 /****************************************/
154 static void ZREL_RelRestOffs1e1( void )
156 stm_rel_start_activity_restriction_normal();
159 /****************************************/
160 /* Action function */
161 /* STM : RelRestOff */
162 /* State : restriction_normal( No 1 ) */
163 /* Event : ELSE( No 4 ) */
164 /****************************************/
165 static void ZREL_RelRestOffs1e4( void )
167 ZREL_RelMainState[ZREL_RELMAINS0F] = ( uint8_t )ZREL_RELRESTOFFS0;
168 stm_rel_start_activity_none();
171 /****************************************/
172 /* Action function */
173 /* STM : RelRestOff */
174 /* State : restriction_split_main( No 2 ) */
175 /* Event : stt_prv_layer_rst_rst_spl_main( No 15 ) */
176 /****************************************/
177 static void ZREL_RelRestOffs2e15( void )
179 stm_rel_start_activity_restriction_split_main();
182 /****************************************/
183 /* Action function */
184 /* STM : RelRestOff */
185 /* State : restriction_split_sub( No 3 ) */
186 /* Event : stt_crr_layer_apps_map_spl( No 0 ) */
187 /****************************************/
188 static void ZREL_RelRestOffs3e0( void )
190 stm_rel_start_activity_restriction_split_sub();
193 /****************************************/
194 /* Event appraisal function */
196 /* State : restriction_mode_off( No 0 ) */
197 /****************************************/
198 static void ZREL_RelMains0Event( void )
200 /*stt_restriction_mode_2_on*/
201 if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNo2On )
203 stm_rel_event_restriction_mode_2_on();
208 /*Else and default design have not done.*/
209 /*Please confirm the STM and design else and default.*/
213 /****************************************/
214 /* Event appraisal function */
215 /* STM : RelRestOff */
216 /* State : none( No 0 ) */
217 /****************************************/
218 static void ZREL_RelRestOffs0Event( void )
220 /*stt_restriction_mode_1_on*/
221 if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNo1On )
223 /*stt_crr_layer_apps_changed*/
224 if( g_stm_crr_state.layer[StmLayerNoApps].changed == STM_TRUE )
226 /*stt_crr_layer_apps_map_spl*/
227 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
229 ZREL_RelRestOffs0e0();
231 /*stt_crr_layer_apps_spl_nml*/
232 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
234 ZREL_RelRestOffs0e1();
236 /*stt_crr_layer_apps_spl_spl*/
237 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplSpl )
239 ZREL_RelRestOffs0e1();
241 /*stt_crr_layer_apps_gen_nml*/
242 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoGenNml )
244 ZREL_RelRestOffs0e1();
248 /*Else and default design have not done.*/
249 /*Please confirm the STM and design else and default.*/
253 else if( g_stm_event == StmEvtNoActivate )
256 if( g_stm_category == StmCtgNoRestriction )
258 /*ara_restriction_normal*/
259 if( g_stm_area == StmAreaNoRestrictionNormal )
261 /*stt_crr_layer_apps_spl_nml*/
262 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
264 ZREL_RelRestOffs0e1();
266 /*stt_crr_layer_apps_map_spl*/
267 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
269 ZREL_RelRestOffs0e0();
273 /*Else and default design have not done.*/
274 /*Please confirm the STM and design else and default.*/
277 /*ara_restriction_split_main*/
278 else if( g_stm_area == StmAreaNoRestrictionSplitMain )
280 ZREL_RelRestOffs0e8();
282 /*ara_restriction_split_sub*/
283 else if( g_stm_area == StmAreaNoRestrictionSplitSub )
285 ZREL_RelRestOffs0e0();
289 /*Else and default design have not done.*/
290 /*Please confirm the STM and design else and default.*/
295 /*Else and default design have not done.*/
296 /*Please confirm the STM and design else and default.*/
301 /*Else and default design have not done.*/
302 /*Please confirm the STM and design else and default.*/
305 /*stt_restriction_mode_off*/
306 else if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNoOff )
309 if( g_stm_event == StmEvtNoUndo )
311 /*stt_prv_layer_rst_none*/
312 if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoNone )
314 ZREL_RelRestOffs0e13();
316 /*stt_prv_layer_rst_rst_nml*/
317 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstNml )
319 ZREL_RelRestOffs0e1();
321 /*stt_prv_layer_rst_rst_spl_main*/
322 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplMain )
324 ZREL_RelRestOffs0e8();
326 /*stt_prv_layer_rst_rst_spl_sub*/
327 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplSub )
329 ZREL_RelRestOffs0e0();
333 /*Else and default design have not done.*/
334 /*Please confirm the STM and design else and default.*/
339 /*Else and default design have not done.*/
340 /*Please confirm the STM and design else and default.*/
345 /*Else and default design have not done.*/
346 /*Please confirm the STM and design else and default.*/
350 /****************************************/
351 /* Event appraisal function */
352 /* STM : RelRestOff */
353 /* State : restriction_normal( No 1 ) */
354 /****************************************/
355 static void ZREL_RelRestOffs1Event( void )
357 /*stt_restriction_mode_1_on*/
358 if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNo1On )
360 /*stt_crr_layer_apps_changed*/
361 if( g_stm_crr_state.layer[StmLayerNoApps].changed == STM_TRUE )
363 /*stt_crr_layer_apps_map_spl*/
364 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
366 ZREL_RelRestOffs0e0();
368 /*stt_crr_layer_apps_spl_nml*/
369 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
371 ZREL_RelRestOffs1e1();
373 /*stt_crr_layer_apps_spl_spl*/
374 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplSpl )
376 ZREL_RelRestOffs1e1();
378 /*stt_crr_layer_apps_gen_nml*/
379 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoGenNml )
381 ZREL_RelRestOffs1e1();
385 ZREL_RelRestOffs1e4();
388 /*stt_crr_layer_hs_changed*/
389 else if( g_stm_crr_state.layer[StmLayerNoHomescreen].changed == STM_TRUE )
391 /*stt_crr_layer_hs_hms*/
392 if( g_stm_crr_state.layer[StmLayerNoHomescreen].state == StmLayoutNoHms )
394 ZREL_RelRestOffs1e4();
398 /*Else and default design have not done.*/
399 /*Please confirm the STM and design else and default.*/
403 else if( g_stm_event == StmEvtNoActivate )
406 if( g_stm_category == StmCtgNoRestriction )
408 /*ara_restriction_normal*/
409 if( g_stm_area == StmAreaNoRestrictionNormal )
411 /*stt_crr_layer_apps_map_spl*/
412 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
414 ZREL_RelRestOffs0e0();
418 /*Else and default design have not done.*/
419 /*Please confirm the STM and design else and default.*/
422 /*ara_restriction_split_main*/
423 else if( g_stm_area == StmAreaNoRestrictionSplitMain )
425 ZREL_RelRestOffs0e8();
427 /*ara_restriction_split_sub*/
428 else if( g_stm_area == StmAreaNoRestrictionSplitSub )
430 ZREL_RelRestOffs0e0();
434 /*Else and default design have not done.*/
435 /*Please confirm the STM and design else and default.*/
439 else if( g_stm_category == StmCtgNoHomescreen )
442 if( g_stm_area == StmAreaNoFullscreen )
444 ZREL_RelRestOffs1e4();
448 /*Else and default design have not done.*/
449 /*Please confirm the STM and design else and default.*/
454 /*Else and default design have not done.*/
455 /*Please confirm the STM and design else and default.*/
459 else if( g_stm_event == StmEvtNoDeactivate )
462 if( g_stm_category == StmCtgNoRestriction )
464 ZREL_RelRestOffs1e4();
468 /*Else and default design have not done.*/
469 /*Please confirm the STM and design else and default.*/
474 /*Else and default design have not done.*/
475 /*Please confirm the STM and design else and default.*/
478 /*stt_restriction_mode_off*/
479 else if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNoOff )
481 /*stt_prv_layer_rst_not_none*/
482 if( g_stm_prv_state.layer[StmLayerNoRestriction].state != StmLayoutNoNone )
484 ZREL_RelRestOffs1e4();
487 else if( g_stm_event == StmEvtNoUndo )
489 /*stt_prv_layer_rst_none*/
490 if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoNone )
492 ZREL_RelRestOffs1e4();
494 /*stt_prv_layer_rst_rst_nml*/
495 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstNml )
497 ZREL_RelRestOffs1e1();
499 /*stt_prv_layer_rst_rst_spl_main*/
500 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplMain )
502 ZREL_RelRestOffs0e8();
504 /*stt_prv_layer_rst_rst_spl_sub*/
505 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplSub )
507 ZREL_RelRestOffs0e0();
511 /*Else and default design have not done.*/
512 /*Please confirm the STM and design else and default.*/
517 /*Else and default design have not done.*/
518 /*Please confirm the STM and design else and default.*/
523 /*Else and default design have not done.*/
524 /*Please confirm the STM and design else and default.*/
528 /****************************************/
529 /* Event appraisal function */
530 /* STM : RelRestOff */
531 /* State : restriction_split_main( No 2 ) */
532 /****************************************/
533 static void ZREL_RelRestOffs2Event( void )
535 /*stt_restriction_mode_1_on*/
536 if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNo1On )
538 /*stt_crr_layer_apps_changed*/
539 if( g_stm_crr_state.layer[StmLayerNoApps].changed == STM_TRUE )
541 /*stt_crr_layer_apps_map_spl*/
542 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
544 ZREL_RelRestOffs0e0();
546 /*stt_crr_layer_apps_spl_nml*/
547 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
549 ZREL_RelRestOffs0e1();
551 /*stt_crr_layer_apps_spl_spl*/
552 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplSpl )
554 ZREL_RelRestOffs0e1();
556 /*stt_crr_layer_apps_gen_nml*/
557 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoGenNml )
559 ZREL_RelRestOffs0e1();
563 ZREL_RelRestOffs1e4();
566 /*stt_crr_layer_hs_changed*/
567 else if( g_stm_crr_state.layer[StmLayerNoHomescreen].changed == STM_TRUE )
569 /*stt_crr_layer_hs_hms*/
570 if( g_stm_crr_state.layer[StmLayerNoHomescreen].state == StmLayoutNoHms )
572 ZREL_RelRestOffs1e4();
576 /*Else and default design have not done.*/
577 /*Please confirm the STM and design else and default.*/
581 else if( g_stm_event == StmEvtNoActivate )
584 if( g_stm_category == StmCtgNoRestriction )
586 /*ara_restriction_normal*/
587 if( g_stm_area == StmAreaNoRestrictionNormal )
589 /*stt_crr_layer_apps_spl_nml*/
590 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
592 ZREL_RelRestOffs0e1();
594 /*stt_crr_layer_apps_map_spl*/
595 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
597 ZREL_RelRestOffs0e0();
601 /*Else and default design have not done.*/
602 /*Please confirm the STM and design else and default.*/
605 /*ara_restriction_split_sub*/
606 else if( g_stm_area == StmAreaNoRestrictionSplitSub )
608 ZREL_RelRestOffs0e1();
612 /*Else and default design have not done.*/
613 /*Please confirm the STM and design else and default.*/
617 else if( g_stm_category == StmCtgNoHomescreen )
620 if( g_stm_area == StmAreaNoFullscreen )
622 ZREL_RelRestOffs1e4();
626 /*Else and default design have not done.*/
627 /*Please confirm the STM and design else and default.*/
632 /*Else and default design have not done.*/
633 /*Please confirm the STM and design else and default.*/
637 else if( g_stm_event == StmEvtNoDeactivate )
640 if( g_stm_category == StmCtgNoRestriction )
642 ZREL_RelRestOffs1e4();
646 /*Else and default design have not done.*/
647 /*Please confirm the STM and design else and default.*/
652 /*Else and default design have not done.*/
653 /*Please confirm the STM and design else and default.*/
656 /*stt_restriction_mode_off*/
657 else if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNoOff )
659 /*stt_prv_layer_rst_not_none*/
660 if( g_stm_prv_state.layer[StmLayerNoRestriction].state != StmLayoutNoNone )
662 ZREL_RelRestOffs1e4();
665 else if( g_stm_event == StmEvtNoUndo )
667 /*stt_prv_layer_rst_none*/
668 if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoNone )
670 ZREL_RelRestOffs1e4();
672 /*stt_prv_layer_rst_rst_nml*/
673 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstNml )
675 ZREL_RelRestOffs0e1();
677 /*stt_prv_layer_rst_rst_spl_main*/
678 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplMain )
680 ZREL_RelRestOffs2e15();
682 /*stt_prv_layer_rst_rst_spl_sub*/
683 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplSub )
685 ZREL_RelRestOffs0e0();
689 /*Else and default design have not done.*/
690 /*Please confirm the STM and design else and default.*/
695 /*Else and default design have not done.*/
696 /*Please confirm the STM and design else and default.*/
701 /*Else and default design have not done.*/
702 /*Please confirm the STM and design else and default.*/
706 /****************************************/
707 /* Event appraisal function */
708 /* STM : RelRestOff */
709 /* State : restriction_split_sub( No 3 ) */
710 /****************************************/
711 static void ZREL_RelRestOffs3Event( void )
713 /*stt_restriction_mode_1_on*/
714 if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNo1On )
716 /*stt_crr_layer_apps_changed*/
717 if( g_stm_crr_state.layer[StmLayerNoApps].changed == STM_TRUE )
719 /*stt_crr_layer_apps_map_spl*/
720 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoMapSpl )
722 ZREL_RelRestOffs3e0();
724 /*stt_crr_layer_apps_spl_nml*/
725 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
727 ZREL_RelRestOffs0e1();
729 /*stt_crr_layer_apps_spl_spl*/
730 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplSpl )
732 ZREL_RelRestOffs0e1();
734 /*stt_crr_layer_apps_gen_nml*/
735 else if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoGenNml )
737 ZREL_RelRestOffs0e1();
741 ZREL_RelRestOffs1e4();
744 /*stt_crr_layer_hs_changed*/
745 else if( g_stm_crr_state.layer[StmLayerNoHomescreen].changed == STM_TRUE )
747 /*stt_crr_layer_hs_hms*/
748 if( g_stm_crr_state.layer[StmLayerNoHomescreen].state == StmLayoutNoHms )
750 ZREL_RelRestOffs1e4();
754 /*Else and default design have not done.*/
755 /*Please confirm the STM and design else and default.*/
759 else if( g_stm_event == StmEvtNoActivate )
762 if( g_stm_category == StmCtgNoRestriction )
764 /*ara_restriction_normal*/
765 if( g_stm_area == StmAreaNoRestrictionNormal )
767 /*stt_crr_layer_apps_spl_nml*/
768 if( g_stm_crr_state.layer[StmLayerNoApps].state == StmLayoutNoSplNml )
770 ZREL_RelRestOffs0e1();
774 /*Else and default design have not done.*/
775 /*Please confirm the STM and design else and default.*/
778 /*ara_restriction_split_main*/
779 else if( g_stm_area == StmAreaNoRestrictionSplitMain )
781 ZREL_RelRestOffs0e1();
785 /*Else and default design have not done.*/
786 /*Please confirm the STM and design else and default.*/
790 else if( g_stm_category == StmCtgNoHomescreen )
793 if( g_stm_area == StmAreaNoFullscreen )
795 ZREL_RelRestOffs1e4();
799 /*Else and default design have not done.*/
800 /*Please confirm the STM and design else and default.*/
805 /*Else and default design have not done.*/
806 /*Please confirm the STM and design else and default.*/
810 else if( g_stm_event == StmEvtNoDeactivate )
813 if( g_stm_category == StmCtgNoRestriction )
815 ZREL_RelRestOffs1e4();
819 /*Else and default design have not done.*/
820 /*Please confirm the STM and design else and default.*/
825 /*Else and default design have not done.*/
826 /*Please confirm the STM and design else and default.*/
829 /*stt_restriction_mode_off*/
830 else if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNoOff )
832 /*stt_prv_layer_rst_not_none*/
833 if( g_stm_prv_state.layer[StmLayerNoRestriction].state != StmLayoutNoNone )
835 ZREL_RelRestOffs1e4();
838 else if( g_stm_event == StmEvtNoUndo )
840 /*stt_prv_layer_rst_none*/
841 if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoNone )
843 ZREL_RelRestOffs1e4();
845 /*stt_prv_layer_rst_rst_nml*/
846 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstNml )
848 ZREL_RelRestOffs0e1();
850 /*stt_prv_layer_rst_rst_spl_main*/
851 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplMain )
853 ZREL_RelRestOffs0e8();
855 /*stt_prv_layer_rst_rst_spl_sub*/
856 else if( g_stm_prv_state.layer[StmLayerNoRestriction].state == StmLayoutNoRstSplSub )
858 ZREL_RelRestOffs3e0();
862 /*Else and default design have not done.*/
863 /*Please confirm the STM and design else and default.*/
868 /*Else and default design have not done.*/
869 /*Please confirm the STM and design else and default.*/
874 /*Else and default design have not done.*/
875 /*Please confirm the STM and design else and default.*/
879 /****************************************/
880 /* Event appraisal function */
882 /* State : restriction_mode_2_on( No 1 ) */
883 /****************************************/
884 static void ZREL_RelMains1Event( void )
886 /*stt_restriction_mode_off*/
887 if( g_stm_crr_state.mode[StmModeNoRestrictionMode].state == StmRestrictionModeSttNoOff )
889 stm_rel_event_restriction_mode_off();
894 /*Else and default design have not done.*/
895 /*Please confirm the STM and design else and default.*/
899 /****************************************/
900 /* Event appraisal function */
901 /* STM : RelRestOn */
902 /* State : none( No 0 ) */
903 /****************************************/
904 static void ZREL_RelRestOns0Event( void )
908 /****************************************/
909 /* Event call function */
911 /****************************************/
912 void stm_rel_event_call( void )
915 switch( ZREL_RelMainState[ZREL_RELMAIN] )
918 switch( ZREL_RelMainState[ZREL_RELMAINS0F] )
920 case ZREL_RELRESTOFFS0:
921 ZREL_RelRestOffs0Event();
923 case ZREL_RELRESTOFFS1:
924 ZREL_RelRestOffs1Event();
926 case ZREL_RELRESTOFFS2:
927 ZREL_RelRestOffs2Event();
929 case ZREL_RELRESTOFFS3:
930 ZREL_RelRestOffs3Event();
933 /*Not accessible to this else (default).*/
936 ZREL_RelMains0Event();
939 switch( ZREL_RelMainState[ZREL_RELMAINS1F] )
941 case ZREL_RELRESTONS0:
942 ZREL_RelRestOns0Event();
945 /*Not accessible to this else (default).*/
948 ZREL_RelMains1Event();
951 /*Not accessible to this else (default).*/
956 /****************************************/
957 /* Initial function */
959 /****************************************/
960 void stm_rel_initialize( void )
962 ZREL_RelMainState[ZREL_RELMAIN] = ( uint8_t )ZREL_RELMAINS0;
963 ZREL_RelMainState[ZREL_RELMAINS0F] = ( uint8_t )ZREL_RELRESTOFFS0;
964 ZREL_RelMainState[ZREL_RELMAINS1F] = ( uint8_t )ZREL_RELRESTONS0;
965 ZREL_RelMains0StateEntry();
968 /****************************************/
969 /* Terminate function */
971 /****************************************/
972 void ZREL_RelMainTerminate( void )
974 ZREL_RelMainState[ZREL_RELMAIN] = ( uint8_t )ZREL_RELMAINTERMINATE;