1 Add AGL reference hardware support
3 Upstream-Status: pending
5 Signed-off-by: Scott Murray <scott.murray@konsulko.com>
6 Signed-off-by: Raquel Medina <raquel.medina@konsulko.com>
9 arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi | 918 ++++++++++++++++++++++
10 arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts | 392 +++++++++
11 drivers/media/i2c/adv748x/adv748x-core.c | 24 +-
12 3 files changed, 1333 insertions(+), 1 deletion(-)
14 diff --git a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi
16 index 000000000000..796ac4c078e0
18 +++ b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi
20 +// SPDX-License-Identifier: GPL-2.0
22 + * Device Tree Source for common parts of AGL Reference Hardware board variants
24 + * Copyright (C) 2015-2017 Renesas Electronics Corp.
25 + * Copyright (C) 2020 Konsulko Group
29 + * This file is derived from salvator-common.dtsi
31 + * It is currently unclear if the modifications made are such that they could
32 + * be done on top of salvator-common.dtsi to allow removing the duplication.
33 + * It is likely that the common pieces with salvator-common.dtsi would need to
34 + * be factored out into a new common file, which is perhaps hard to justify.
40 + * This command is required when Playback/Capture
42 + * amixer set "DVC Out" 100%
43 + * amixer set "DVC In" 100%
47 + * amixer set "DVC Out Mute" on
48 + * amixer set "DVC In Mute" on
50 + * You can use Volume Ramp
52 + * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
53 + * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
54 + * amixer set "DVC Out Ramp" on
56 + * amixer set "DVC Out" 80% // Volume Down
57 + * amixer set "DVC Out" 100% // Volume Up
60 +#include <dt-bindings/gpio/gpio.h>
74 + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
75 + stdout-path = "serial0:115200n8";
78 + audio_clkout: audio-clkout {
80 + * This is same as <&rcar_sound 0>
81 + * but needed to avoid cs2000/rcar_sound probe dead-lock
83 + compatible = "fixed-clock";
85 + clock-frequency = <12288000>;
89 + compatible = "renesas,avb-mch-gen3";
90 + reg = <0 0xec5a0100 0 0x100>; /* ADG_AVB */
91 + reg-name = "adg_avb";
93 + clocks = <&cpg CPG_MOD 922>;
94 + clock-names = "adg";
95 + resets = <&cpg 922>;
99 + compatible = "hdmi-connector";
100 + label = "HDMI0 IN";
104 + hdmi_in_con: endpoint {
105 + remote-endpoint = <&adv7481_hdmi>;
111 + compatible = "hdmi-connector";
112 + label = "HDMI2 IN";
116 + hdmi_in_con2: endpoint {
117 + remote-endpoint = <&adv7481_hdmi2>;
122 + reg_1p8v: regulator0 {
123 + compatible = "regulator-fixed";
124 + regulator-name = "fixed-1.8V";
125 + regulator-min-microvolt = <1800000>;
126 + regulator-max-microvolt = <1800000>;
128 + regulator-always-on;
131 + reg_3p3v: regulator1 {
132 + compatible = "regulator-fixed";
133 + regulator-name = "fixed-3.3V";
134 + regulator-min-microvolt = <3300000>;
135 + regulator-max-microvolt = <3300000>;
137 + regulator-always-on;
140 + reg_12v: regulator2 {
141 + compatible = "regulator-fixed";
142 + regulator-name = "fixed-12V";
143 + regulator-min-microvolt = <12000000>;
144 + regulator-max-microvolt = <12000000>;
146 + regulator-always-on;
149 + sound_card: sound {
150 + compatible = "audio-graph-card";
154 + dais = <&rsnd_port0>;
157 + vcc_sdhi0: regulator-vcc-sdhi0 {
158 + compatible = "regulator-fixed";
160 + regulator-name = "SDHI0 Vcc";
161 + regulator-min-microvolt = <3300000>;
162 + regulator-max-microvolt = <3300000>;
164 + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
165 + enable-active-high;
168 + vccq_sdhi0: regulator-vccq-sdhi0 {
169 + compatible = "regulator-gpio";
171 + regulator-name = "SDHI0 VccQ";
172 + regulator-min-microvolt = <1800000>;
173 + regulator-max-microvolt = <3300000>;
175 + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
176 + gpios-states = <1>;
177 + states = <3300000 1
181 + vcc_sdhi3: regulator-vcc-sdhi3 {
182 + compatible = "regulator-fixed";
184 + regulator-name = "SDHI3 Vcc";
185 + regulator-min-microvolt = <3300000>;
186 + regulator-max-microvolt = <3300000>;
188 + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
189 + enable-active-high;
192 + vccq_sdhi3: regulator-vccq-sdhi3 {
193 + compatible = "regulator-gpio";
195 + regulator-name = "SDHI3 VccQ";
196 + regulator-min-microvolt = <1800000>;
197 + regulator-max-microvolt = <3300000>;
199 + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
200 + gpios-states = <1>;
201 + states = <3300000 1
206 + compatible = "hdmi-connector";
207 + label = "HDMI0 OUT";
211 + hdmi0_con: endpoint {
217 + compatible = "hdmi-connector";
218 + label = "HDMI1 OUT";
222 + hdmi1_con: endpoint {
228 + compatible = "fixed-clock";
229 + #clock-cells = <0>;
230 + clock-frequency = <24576000>;
233 + /* External DU dot clocks */
234 + x21_clk: x21-clock {
235 + compatible = "fixed-clock";
236 + #clock-cells = <0>;
237 + clock-frequency = <33000000>;
240 + x22_clk: x22-clock {
241 + compatible = "fixed-clock";
242 + #clock-cells = <0>;
243 + clock-frequency = <33000000>;
246 + x23_clk: x23-clock {
247 + compatible = "fixed-clock";
248 + #clock-cells = <0>;
249 + clock-frequency = <25000000>;
254 + cpu-supply = <&dvfs>;
258 + clock-frequency = <22579200>;
262 + pinctrl-0 = <&avb_pins>;
263 + pinctrl-names = "default";
264 + phy-handle = <&phy0>;
265 + phy-mode = "rgmii-txid";
268 + phy0: ethernet-phy@0 {
269 + rxc-skew-ps = <1500>;
271 + interrupt-parent = <&gpio2>;
272 + interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
273 + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
284 + csi40_in: endpoint {
286 + data-lanes = <1 2 3 4>;
287 + remote-endpoint = <&adv7481_txa>;
300 + csi41_in: endpoint {
302 + data-lanes = <1 2 3 4>;
303 + remote-endpoint = <&adv7481_txa2>;
324 + clock-frequency = <32768>;
328 + pinctrl-0 = <&hscif0_pins>;
329 + pinctrl-names = "default";
336 + pinctrl-0 = <&hscif1_pins>;
337 + pinctrl-names = "default";
339 + /* Please use exclusively to the scif1 node */
344 + pinctrl-0 = <&hscif2_pins>;
345 + pinctrl-names = "default";
356 + pinctrl-0 = <&i2c2_pins>;
357 + pinctrl-names = "default";
361 + clock-frequency = <100000>;
363 + video-receiver@70 {
364 + compatible = "adi,adv7481";
365 + reg = <0x70 0x26 0x22 0x34 0x36 0x32
366 + 0x31 0x30 0x41 0x79 0x4a 0x48>;
367 + reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
368 + "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
370 + #address-cells = <1>;
373 + interrupt-parent = <&gpio0>;
374 + interrupt-names = "intrq1", "intrq3";
375 + interrupts = <4 IRQ_TYPE_LEVEL_LOW>,
376 + <5 IRQ_TYPE_LEVEL_LOW>;
381 + adv7481_hdmi: endpoint {
382 + remote-endpoint = <&hdmi_in_con>;
389 + adv7481_txa: endpoint {
391 + data-lanes = <1 2 3 4>;
392 + remote-endpoint = <&csi40_in>;
398 + video-receiver@71 {
399 + compatible = "adi,adv7481";
400 + reg = <0x71 0x27 0x23 0x35 0x37 0x33
401 + 0x28 0x29 0x42 0x78 0x4b 0x49>;
402 + reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
403 + "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
405 + #address-cells = <1>;
408 + interrupt-parent = <&gpio6>;
409 + interrupt-names = "intrq1", "intrq3";
410 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
411 + <1 IRQ_TYPE_LEVEL_LOW>;
416 + adv7481_hdmi2: endpoint {
417 + remote-endpoint = <&hdmi_in_con2>;
424 + adv7481_txa2: endpoint {
426 + data-lanes = <1 2 3 4>;
427 + remote-endpoint = <&csi41_in>;
432 + cs2000: clk_multiplier@4f {
433 + #clock-cells = <0>;
434 + compatible = "cirrus,cs2000-cp";
436 + clocks = <&audio_clkout>, <&x12_clk>;
437 + clock-names = "clk_in", "ref_clk";
439 + assigned-clocks = <&cs2000>;
440 + assigned-clock-rates = <24576000>; /* 1/1 divide */
445 + pinctrl-0 = <&i2c3_pins>;
446 + pinctrl-names = "default";
450 + clock-frequency = <100000>;
453 + compatible = "st,asm330lhh";
456 + interrupt-names = "int1", "int2";
457 + interrupts = <&gpio6 23 IRQ_TYPE_EDGE_RISING>,
458 + <&gpio2 6 IRQ_TYPE_EDGE_RISING>;
465 + versaclock5: clock-generator@68 {
466 + compatible = "idt,9fgv0841";
468 + #clock-cells = <1>;
469 + clocks = <&x23_clk>;
470 + clock-names = "xin";
475 + pinctrl-0 = <&i2c5_pins>;
476 + pinctrl-names = "default";
480 + clock-frequency = <100000>;
483 + compatible = "asahi-kasei,ak4613";
484 + #sound-dai-cells = <0>;
486 + clocks = <&rcar_sound 3>;
488 + asahi-kasei,in1-single-end;
489 + asahi-kasei,in2-single-end;
490 + asahi-kasei,out1-single-end;
491 + asahi-kasei,out2-single-end;
492 + asahi-kasei,out3-single-end;
493 + asahi-kasei,out4-single-end;
494 + asahi-kasei,out5-single-end;
495 + asahi-kasei,out6-single-end;
498 + ak4613_endpoint: endpoint {
499 + remote-endpoint = <&rsnd_endpoint0>;
508 + clock-frequency = <400000>;
511 + pinctrl-0 = <&irq0_pins>;
512 + pinctrl-names = "default";
514 + compatible = "rohm,bd9571mwv";
516 + interrupt-parent = <&intc_ex>;
517 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
518 + interrupt-controller;
519 + #interrupt-cells = <2>;
522 + rohm,ddr-backup-power = <0xf>;
523 + rohm,rstbmode-level;
527 + regulator-name = "dvfs";
528 + regulator-min-microvolt = <750000>;
529 + regulator-max-microvolt = <1030000>;
531 + regulator-always-on;
537 + compatible = "rohm,br24t01", "atmel,24c01";
553 + clock-frequency = <100000000>;
566 + pinctrl-0 = <&canfd0_pins &canfd1_pins>;
567 + pinctrl-names = "default";
581 + pinctrl-0 = <&scif_clk_pins>;
582 + pinctrl-names = "default";
586 + groups = "avb_link", "avb_mdio", "avb_mii";
591 + groups = "avb_mdio";
592 + drive-strength = <24>;
596 + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
597 + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
598 + drive-strength = <12>;
602 + hscif0_pins: hscif0 {
603 + groups = "hscif0_data", "hscif0_ctrl";
604 + function = "hscif0";
607 + hscif1_pins: hscif1 {
608 + groups = "hscif1_data_a";
609 + function = "hscif1";
612 + hscif2_pins: hscif2 {
613 + groups = "hscif2_data_c";
614 + function = "hscif2";
633 + groups = "intc_ex_irq0";
634 + function = "intc_ex";
637 + scif1_pins: scif1 {
638 + groups = "scif1_data_b";
639 + function = "scif1";
642 + scif2_pins: scif2 {
643 + groups = "scif2_data_a";
644 + function = "scif2";
647 + scif5_pins: scif5 {
648 + groups = "scif5_data_a";
649 + function = "scif5";
652 + scif_clk_pins: scif_clk {
653 + groups = "scif_clk_a";
654 + function = "scif_clk";
658 + groups = "sdhi0_data4", "sdhi0_ctrl";
659 + function = "sdhi0";
660 + power-source = <3300>;
663 + sdhi0_pins_uhs: sd0_uhs {
664 + groups = "sdhi0_data4", "sdhi0_ctrl";
665 + function = "sdhi0";
666 + power-source = <1800>;
670 + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
671 + function = "sdhi2";
672 + power-source = <3300>;
675 + sdhi2_pins_uhs: sd2_uhs {
676 + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
677 + function = "sdhi2";
678 + power-source = <1800>;
682 + groups = "sdhi3_data4", "sdhi3_ctrl";
683 + function = "sdhi3";
684 + power-source = <3300>;
687 + sdhi3_pins_uhs: sd3_uhs {
688 + groups = "sdhi3_data4", "sdhi3_ctrl";
689 + function = "sdhi3";
690 + power-source = <1800>;
693 + sound_pins: sound {
694 + groups = "ssi349_ctrl", "ssi3_data", "ssi4_data";
698 + sound_clk_pins: sound_clk {
699 + groups = "audio_clk_a_a", "audio_clk_b_a",
700 + "audio_clkout_a", "audio_clkout3_b";
701 + function = "audio_clk";
710 + groups = "usb1_ovc";
714 + usb30_pins: usb30 {
715 + groups = "usb30", "usb30_ovc";
716 + function = "usb30";
719 + canfd0_pins: canfd0 {
720 + groups = "canfd0_data_a";
721 + function = "canfd0";
724 + canfd1_pins: canfd1 {
725 + groups = "canfd1_data";
726 + function = "canfd1";
731 + pinctrl-0 = <&sound_pins &sound_clk_pins>;
732 + pinctrl-names = "default";
735 + #sound-dai-cells = <0>;
737 + /* audio_clkout0/1/2/3 */
738 + #clock-cells = <1>;
739 + clock-frequency = <12288000 11289600>;
743 + /* update <audio_clk_b> to <cs2000> */
744 + clocks = <&cpg CPG_MOD 1005>,
745 + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
746 + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
747 + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
748 + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
749 + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
750 + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
751 + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
752 + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
753 + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
754 + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
755 + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
756 + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
757 + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
758 + <&audio_clk_a>, <&cs2000>,
760 + <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
763 + #address-cells = <1>;
765 + rsnd_port0: port@0 {
767 + rsnd_endpoint0: endpoint {
768 + remote-endpoint = <&ak4613_endpoint>;
770 + dai-format = "left_j";
771 + bitclock-master = <&rsnd_endpoint0>;
772 + frame-master = <&rsnd_endpoint0>;
774 + playback = <&ssi3>; //ssi0 -> ssi3
775 + capture = <&ssi4>; //ssi1 -> ssi4
782 + timeout-sec = <60>;
787 + pinctrl-0 = <&scif1_pins>;
788 + pinctrl-names = "default";
791 + /* Please use exclusively to the hscif1 node */
796 + pinctrl-0 = <&scif2_pins>;
797 + pinctrl-names = "default";
803 + pinctrl-0 = <&scif5_pins>;
804 + pinctrl-names = "default";
810 + clock-frequency = <14745600>;
814 + pinctrl-0 = <&sdhi0_pins>;
815 + pinctrl-1 = <&sdhi0_pins_uhs>;
816 + pinctrl-names = "default", "state_uhs";
818 + vmmc-supply = <&vcc_sdhi0>;
819 + vqmmc-supply = <&vccq_sdhi0>;
820 + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
821 + wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
829 + /* used for on-board 8bit eMMC */
830 + pinctrl-0 = <&sdhi2_pins>;
831 + pinctrl-1 = <&sdhi2_pins_uhs>;
832 + pinctrl-names = "default", "state_uhs";
834 + iommus = <&ipmmu_ds1 34>;
836 + vmmc-supply = <®_3p3v>;
837 + vqmmc-supply = <®_1p8v>;
844 + fixed-emmc-driver-type = <1>;
849 + pinctrl-0 = <&sdhi3_pins>;
850 + pinctrl-1 = <&sdhi3_pins_uhs>;
851 + pinctrl-names = "default", "state_uhs";
853 + vmmc-supply = <&vcc_sdhi3>;
854 + vqmmc-supply = <&vccq_sdhi3>;
855 + cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
856 + wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
868 + clock-frequency = <50000000>;
872 + pinctrl-0 = <&usb0_pins>;
873 + pinctrl-names = "default";
879 + pinctrl-0 = <&usb1_pins>;
880 + pinctrl-names = "default";
886 + phys = <&usb3_phy0>;
897 + clock-frequency = <100000000>;
933 + pinctrl-0 = <&usb30_pins>;
934 + pinctrl-names = "default";
938 diff --git a/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts b/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts
940 index 000000000000..83638a6228c0
942 +++ b/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts
945 + * Device Tree Source for the AGL reference hardware board with R-Car H3 ES3.0
947 + * Copyright (C) 2019 Panasonic Corp.
948 + * Copyright (C) 2020 Konsulko Group
950 + * This file is licensed under the terms of the GNU General Public License
951 + * version 2. This program is licensed "as is" without any warranty of any
952 + * kind, whether express or implied.
956 + * This file is for the most part derived from:
958 + * - r8a7795-salvator-xs-4x2g.dts
959 + * - r8a7795-salvator-xs.dts
960 + * - salvator-xs.dtsi
962 + * With agl-refhw-common.dtsi replacing (and derived from) salvator-common.dtsi.
966 +#include "r8a7795.dtsi"
967 +#include "agl-refhw-common.dtsi"
970 + model = "AGL Reference Hardware based on r8a7795 ES3.0+ with 8GiB (4 x 2 GiB)";
971 + compatible = "agl,refhw-h3", "renesas,r8a7795";
974 + device_type = "memory";
975 + /* first 128MB is reserved for secure area. */
976 + reg = <0x0 0x48000000 0x0 0x78000000>;
980 + device_type = "memory";
981 + reg = <0x5 0x00000000 0x0 0x80000000>;
985 + device_type = "memory";
986 + reg = <0x6 0x00000000 0x0 0x80000000>;
990 + device_type = "memory";
991 + reg = <0x7 0x00000000 0x0 0x80000000>;
995 + #address-cells = <2>;
999 + /* device specific region for Lossy Decompression */
1000 + lossy_decompress: linux,lossy_decompress@54000000 {
1002 + reg = <0x00000000 0x54000000 0x0 0x03000000>;
1005 + /* For Audio DSP */
1006 + adsp_reserved: linux,adsp@57000000 {
1007 + compatible = "shared-dma-pool";
1009 + reg = <0x00000000 0x57000000 0x0 0x01000000>;
1012 + /* global autoconfigured region for contiguous allocations */
1013 + linux,cma@58000000 {
1014 + compatible = "shared-dma-pool";
1016 + reg = <0x00000000 0x58000000 0x0 0x18000000>;
1017 + linux,cma-default;
1020 + /* device specific region for contiguous allocations */
1021 + mmp_reserved: linux,multimedia@70000000 {
1022 + compatible = "shared-dma-pool";
1024 + reg = <0x00000000 0x70000000 0x0 0x10000000>;
1029 + compatible = "renesas,mmngr";
1030 + memory-region = <&mmp_reserved>, <&lossy_decompress>;
1034 + compatible = "renesas,mmngrbuf";
1038 + compatible = "renesas,vspm_if";
1043 + vga_in: endpoint {
1044 + /delete-property/remote-endpoint;
1052 + adv7123_in: endpoint {
1053 + /delete-property/remote-endpoint;
1058 + adv7123_out: endpoint {
1059 + /delete-property/remote-endpoint;
1069 + memory-region = <&adsp_reserved>;
1073 + clocks = <&cpg CPG_MOD 724>,
1074 + <&cpg CPG_MOD 723>,
1075 + <&cpg CPG_MOD 722>,
1076 + <&cpg CPG_MOD 721>,
1081 + clock-names = "du.0", "du.1", "du.2", "du.3",
1082 + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
1100 + dais = <&rsnd_port0 /* ak4613 */
1101 + &rsnd_port1 /* HDMI0 */
1102 + &rsnd_port2>; /* HDMI1 */
1111 + rcar_dw_hdmi0_out: endpoint {
1112 + remote-endpoint = <&hdmi0_con>;
1117 + dw_hdmi0_snd_in: endpoint {
1118 + remote-endpoint = <&rsnd_endpoint1>;
1125 + remote-endpoint = <&rcar_dw_hdmi0_out>;
1134 + rcar_dw_hdmi1_out: endpoint {
1135 + remote-endpoint = <&hdmi1_con>;
1140 + dw_hdmi1_snd_in: endpoint {
1141 + remote-endpoint = <&rsnd_endpoint2>;
1148 + remote-endpoint = <&rcar_dw_hdmi1_out>;
1162 + /* rsnd_port0 is on salvator-common */
1163 + rsnd_port1: port@1 {
1165 + rsnd_endpoint1: endpoint {
1166 + remote-endpoint = <&dw_hdmi0_snd_in>;
1168 + dai-format = "i2s";
1169 + bitclock-master = <&rsnd_endpoint1>;
1170 + frame-master = <&rsnd_endpoint1>;
1172 + playback = <&ssi2>;
1175 + rsnd_port2: port@2 {
1177 + rsnd_endpoint2: endpoint {
1178 + remote-endpoint = <&dw_hdmi1_snd_in>;
1180 + dai-format = "i2s";
1181 + bitclock-master = <&rsnd_endpoint2>;
1182 + frame-master = <&rsnd_endpoint2>;
1184 + playback = <&ssi3>;
1192 + groups = "usb2", "usb2_ovc";
1193 + function = "usb2";
1197 + * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
1198 + * (when SW31 is the default setting on Salvator-XS).
1199 + * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
1200 + * r8a7795 with Salvator-XS.
1201 + * Hence the SW31 setting must be changed like 2) below.
1202 + * 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
1203 + * - Connect GP6_3[01] to ADV7842.
1204 + * 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
1205 + * - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
1206 + * - Connect GP6_{04,21} to ADV7842.
1208 + usb2_ch3_pins: usb2_ch3 {
1209 + groups = "usb2_ch3";
1210 + function = "usb2_ch3";
1215 + pinctrl-0 = <&usb2_pins>;
1216 + pinctrl-names = "default";
1222 + pinctrl-0 = <&usb2_ch3_pins>;
1223 + pinctrl-names = "default";
1244 +/* End r8a7795-salvator-xs.dts content */
1247 +/* Start r8a7795-salvator-xs-4x2g.dts content */
1250 + /* Map all possible DDR as inbound ranges */
1251 + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1255 + /* Map all possible DDR as inbound ranges */
1256 + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1259 +/* End r8a7795-salvator-xs-4x2g.dts content */
1262 +/* Start salvator-xs.dts content */
1265 + clock-frequency = <16640000>;
1269 + clock-frequency = <400000>;
1271 + versaclock6: clock-generator@6a {
1272 + compatible = "idt,5p49v6901";
1274 + #clock-cells = <1>;
1275 + clocks = <&x23_clk>;
1276 + clock-names = "xin";
1280 +/* End salvator-xs.dts content */
1283 +/* Start reference hardware specific tweaks */
1289 + /delete-property/remote-endpoint;
1295 + /delete-property/remote-endpoint;
1302 + status = "disabled";
1306 + status = "disabled";
1310 + clock-frequency = <0>;
1314 + /delete-property/ wp-gpios;
1319 + /delete-property/ wp-gpios;
1324 + /* Enable the CAN 1 & 2 transceivers */
1325 + can-1-transceiver-stb {
1327 + gpios = <21 GPIO_ACTIVE_HIGH>;
1330 + can-2-transceiver-stb {
1332 + gpios = <12 GPIO_ACTIVE_HIGH>;
1336 diff --git a/drivers/media/i2c/adv748x/adv748x-core.c b/drivers/media/i2c/adv748x/adv748x-core.c
1337 index 87092ce5ba73..357c334113aa 100644
1338 --- a/drivers/media/i2c/adv748x/adv748x-core.c
1339 +++ b/drivers/media/i2c/adv748x/adv748x-core.c
1340 @@ -97,6 +97,21 @@ static const struct adv748x_register_map adv748x_default_addresses[] = {
1341 [ADV748X_PAGE_TXA] = { "txa", 0x4a },
1344 +static const struct adv748x_register_map adv748x_default_addresses2[] = {
1345 + [ADV748X_PAGE_IO] = { "main", 0x71 },
1346 + [ADV748X_PAGE_DPLL] = { "dpll", 0x27 },
1347 + [ADV748X_PAGE_CP] = { "cp", 0x23 },
1348 + [ADV748X_PAGE_HDMI] = { "hdmi", 0x35 },
1349 + [ADV748X_PAGE_EDID] = { "edid", 0x37 },
1350 + [ADV748X_PAGE_REPEATER] = { "repeater", 0x33 },
1351 + [ADV748X_PAGE_INFOFRAME] = { "infoframe", 0x28 },
1352 + [ADV748X_PAGE_CBUS] = { "cbus", 0x29 },
1353 + [ADV748X_PAGE_CEC] = { "cec", 0x42 },
1354 + [ADV748X_PAGE_SDP] = { "sdp", 0x78 },
1355 + [ADV748X_PAGE_TXB] = { "txb", 0x49 },
1356 + [ADV748X_PAGE_TXA] = { "txa", 0x4b },
1359 static int adv748x_read_check(struct adv748x_state *state,
1360 int client_page, u8 reg)
1362 @@ -183,10 +198,17 @@ static int adv748x_initialise_clients(struct adv748x_state *state)
1365 for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) {
1366 - state->i2c_clients[i] = i2c_new_ancillary_device(
1367 + if ((state->client->addr << 1) == 0xe0) {
1368 + state->i2c_clients[i] = i2c_new_ancillary_device(
1370 adv748x_default_addresses[i].name,
1371 adv748x_default_addresses[i].default_addr);
1373 + state->i2c_clients[i] = i2c_new_ancillary_device(
1375 + adv748x_default_addresses2[i].name,
1376 + adv748x_default_addresses2[i].default_addr);
1379 if (IS_ERR(state->i2c_clients[i])) {
1380 adv_err(state, "failed to create i2c client %u\n", i);