meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-linux-x86-demo.c

   1 /*
   2  * Jailhouse, a Linux-based partitioning hypervisor
   3  *
   4  * Configuration for Linux inmate, 1 CPU, 74 MB RAM, ~1MB shmem, serial ports
   5  *
   6  * Copyright (c) Siemens AG, 2013-2015
   7  *
   8  * Authors:
   9  *  Jan Kiszka <jan.kiszka@siemens.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  */
  14
  15 #include <jailhouse/types.h>
  16 #include <jailhouse/cell-config.h>
  17
  18 struct {
  19         struct jailhouse_cell_desc cell;
  20         __u64 cpus[1];
  21 #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT
  22         struct jailhouse_memory mem_regions[24];
  23 #else
  24         struct jailhouse_memory mem_regions[20];
  25 #endif
  26         struct jailhouse_cache cache_regions[1];
  27         struct jailhouse_irqchip irqchips[1];
  28         struct jailhouse_pio pio_regions[2];
  29 #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT
  30         struct jailhouse_pci_device pci_devices[5];
  31 #else
  32         struct jailhouse_pci_device pci_devices[4];
  33 #endif
  34         struct jailhouse_pci_capability pci_caps[6];
  35 } __attribute__((packed)) config = {
  36         .cell = {
  37                 .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
  38                 .revision = JAILHOUSE_CONFIG_REVISION,
  39                 .name = "agl-linux-x86-demo",
  40                 .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
  41                          JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
  42
  43                 .cpu_set_size = sizeof(config.cpus),
  44                 .num_memory_regions = ARRAY_SIZE(config.mem_regions),
  45                 .num_cache_regions = ARRAY_SIZE(config.cache_regions),
  46                 .num_irqchips = ARRAY_SIZE(config.irqchips),
  47                 .num_pio_regions = ARRAY_SIZE(config.pio_regions),
  48                 .num_pci_devices = ARRAY_SIZE(config.pci_devices),
  49                 .num_pci_caps = ARRAY_SIZE(config.pci_caps),
  50         },
  51
  52         .cpus = {
  53                 0b1100,
  54         },
  55
  56         .mem_regions = {
  57
  58                 /* IVSHMEM shared memory region (virtio-blk front) */
  59                 {
  60                         .phys_start = 0x22000000,
  61                         .virt_start = 0x22000000,
  62                         .size = 0x1000,
  63                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
  64                 },
  65                 {
  66                         .phys_start = 0x22001000,
  67                         .virt_start = 0x22001000,
  68                         .size = 0xdf000,
  69                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  70                                 JAILHOUSE_MEM_ROOTSHARED,
  71                 },
  72                 { 0 },
  73                 { 0 },
  74                 /* IVSHMEM shared memory region (virtio-con front) */
  75                 {
  76                         .phys_start = 0x220e0000,
  77                         .virt_start = 0x220e0000,
  78                         .size = 0x1000,
  79                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
  80                 },
  81                 {
  82                         .phys_start = 0x220e1000,
  83                         .virt_start = 0x220e1000,
  84                         .size = 0xf000,
  85                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  86                                 JAILHOUSE_MEM_ROOTSHARED,
  87                 },
  88                 { 0 },
  89                 { 0 },
  90
  91                 /* IVSHMEM shared memory regions (demo) */
  92                 {
  93                         .phys_start = 0x220f0000,
  94                         .virt_start = 0x220f0000,
  95                         .size = 0x1000,
  96                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
  97                 },
  98                 {
  99                         .phys_start = 0x220f1000,
 100                         .virt_start = 0x220f1000,
 101                         .size = 0x9000,
 102                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 103                                 JAILHOUSE_MEM_ROOTSHARED,
 104                 },
 105                 {
 106                         .phys_start = 0x220fa000,
 107                         .virt_start = 0x220fa000,
 108                         .size = 0x2000,
 109                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
 110                 },
 111                 {
 112                         .phys_start = 0x220fc000,
 113                         .virt_start = 0x220fc000,
 114                         .size = 0x2000,
 115                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
 116                 },
 117                 {
 118                         .phys_start = 0x220fe000,
 119                         .virt_start = 0x220fe000,
 120                         .size = 0x2000,
 121                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 122                                 JAILHOUSE_MEM_ROOTSHARED,
 123                 },
 124                 /* IVSHMEM shared memory regions (networking) */
 125                 JAILHOUSE_SHMEM_NET_REGIONS(0x22100000, 1),
 126                 /* low RAM */ {
 127                         .phys_start = 0x22600000,
 128                         .virt_start = 0,
 129                         .size = 0x00100000,
 130                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 131                                 JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
 132                                 JAILHOUSE_MEM_LOADABLE,
 133                 },
 134                 /* communication region */ {
 135                         .virt_start = 0x00100000,
 136                         .size = 0x00001000,
 137                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 138                                 JAILHOUSE_MEM_COMM_REGION,
 139                 },
 140                 /* high RAM */ {
 141                         .phys_start = 0x22700000,
 142                         .virt_start = 0x00200000,
 143                         .size = 0x4700000,
 144                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 145                                 JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
 146                                 JAILHOUSE_MEM_LOADABLE,
 147                 },
 148 #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT
 149                 /* MemRegion: feb40000-feb7ffff : 0000:00:02.0 */
 150                 {
 151                         .phys_start = 0xfeb40000,
 152                         .virt_start = 0xfeb40000,
 153                         .size = 0x40000,
 154                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
 155                 },
 156                 /* MemRegion: feb80000-feb9ffff : e1000e */
 157                 {
 158                         .phys_start = 0xfeb80000,
 159                         .virt_start = 0xfeb80000,
 160                         .size = 0x20000,
 161                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
 162                 },
 163                 /* MemRegion: feba0000-febbffff : e1000e */
 164                 {
 165                         .phys_start = 0xfeba0000,
 166                         .virt_start = 0xfeba0000,
 167                         .size = 0x20000,
 168                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
 169                 },
 170                 /* MemRegion: febd1000-febd3fff : e1000e */
 171                 {
 172                         .phys_start = 0xfebd1000,
 173                         .virt_start = 0xfebd1000,
 174                         .size = 0x3000,
 175                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
 176                 },
 177 #endif
 178         },
 179
 180         .cache_regions = {
 181                 {
 182                         .start = 0,
 183                         .size = 2,
 184                         .type = JAILHOUSE_CACHE_L3,
 185                 },
 186         },
 187
 188         .irqchips = {
 189                 /* IOAPIC */ {
 190                         .address = 0xfec00000,
 191                         .id = 0xff00,
 192                         .pin_bitmap = {
 193                                 (1 << 3) | (1 << 4),
 194                         },
 195                 },
 196         },
 197
 198         .pio_regions = {
 199                 PIO_RANGE(0x2e8, 8), /* serial 2: ttyS3(0x2e8) */
 200                 PIO_RANGE(0x3e8, 8), /* serial 1: ttyS2(0x3e8) */
 201 //              PIO_RANGE(0xe010, 8), /* OXPCIe952 serial1 */
 202         },
 203
 204         .pci_devices = {
 205                 {
 206                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 207                         .domain = 0x0,
 208                         .bdf = 0x0c << 3,
 209                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 210                         .num_msix_vectors = 2,
 211                         .shmem_regions_start = 0,
 212                         .shmem_dev_id = 1,
 213                         .shmem_peers = 2,
 214                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VIRTIO_FRONT +
 215                                 VIRTIO_DEV_BLOCK,
 216                 },
 217                 {
 218                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 219                         .domain = 0x0,
 220                         .bdf = 0x0d << 3,
 221                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 222                         .num_msix_vectors = 3,
 223                         .shmem_regions_start = 4,
 224                         .shmem_dev_id = 1,
 225                         .shmem_peers = 2,
 226                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VIRTIO_FRONT +
 227                                 VIRTIO_DEV_CONSOLE,
 228                 },
 229                 {
 230                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 231                         .domain = 0x0,
 232                         .bdf = 0x0e << 3,
 233                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 234                         .num_msix_vectors = 16,
 235                         .shmem_regions_start = 8,
 236                         .shmem_dev_id = 2,
 237                         .shmem_peers = 3,
 238                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
 239                 },
 240                 {
 241                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 242                         .domain = 0x0,
 243                         .bdf = 0x0f << 3,
 244                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 245                         .num_msix_vectors = 2,
 246                         .shmem_regions_start = 13,
 247                         .shmem_dev_id = 1,
 248                         .shmem_peers = 2,
 249                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
 250                 },
 251 #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT
 252                 { /* e1000e */
 253                         .type = JAILHOUSE_PCI_TYPE_DEVICE,
 254                         .domain = 0x0000,
 255                         .bdf = 0x0010,
 256                         .bar_mask = {
 257                                 0xfffe0000, 0xfffe0000, 0xffffffe0,
 258                                 0xffffc000, 0x00000000, 0x00000000,
 259                         },
 260                         .caps_start = 0,
 261                         .num_caps = 6,
 262                         .num_msi_vectors = 1,
 263                         .msi_64bits = 1,
 264                         .num_msix_vectors = 5,
 265                         .msix_region_size = 0x1000,
 266                         .msix_address = 0xfebd0000,
 267                 },
 268 #endif
 269         },
 270
 271         .pci_caps = {
 272                 { /* e1000e */
 273                         .id = PCI_CAP_ID_PM,
 274                         .start = 0xc8,
 275                         .len = 8,
 276                         .flags = JAILHOUSE_PCICAPS_WRITE,
 277                 },
 278                 {
 279                         .id = PCI_CAP_ID_MSI,
 280                         .start = 0xd0,
 281                         .len = 14,
 282                         .flags = JAILHOUSE_PCICAPS_WRITE,
 283                 },
 284                 {
 285                         .id = PCI_CAP_ID_EXP,
 286                         .start = 0xe0,
 287                         .len = 20,
 288                         .flags = JAILHOUSE_PCICAPS_WRITE,
 289                 },
 290                 {
 291                         .id = PCI_CAP_ID_MSIX,
 292                         .start = 0xa0,
 293                         .len = 12,
 294                         .flags = JAILHOUSE_PCICAPS_WRITE,
 295                 },
 296                 {
 297                         .id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
 298                         .start = 0x100,
 299                         .len = 4,
 300                         .flags = 0,
 301                 },
 302                 {
 303                         .id = PCI_EXT_CAP_ID_DSN | JAILHOUSE_PCI_EXT_CAP,
 304                         .start = 0x140,
 305                         .len = 4,
 306                         .flags = 0,
 307                 },
 308         }
 309 };