meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-linux-x86-demo.c

   1 /*
   2  * Jailhouse, a Linux-based partitioning hypervisor
   3  *
   4  * Configuration for Linux inmate, 1 CPU, 74 MB RAM, ~1MB shmem, serial ports
   5  *
   6  * Copyright (c) Siemens AG, 2013-2015
   7  *
   8  * Authors:
   9  *  Jan Kiszka <jan.kiszka@siemens.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  */
  14
  15 #include <jailhouse/types.h>
  16 #include <jailhouse/cell-config.h>
  17
  18 struct {
  19         struct jailhouse_cell_desc cell;
  20         __u64 cpus[1];
  21         struct jailhouse_memory mem_regions[20];
  22         struct jailhouse_cache cache_regions[1];
  23         struct jailhouse_irqchip irqchips[1];
  24         struct jailhouse_pio pio_regions[1];
  25         struct jailhouse_pci_device pci_devices[4];
  26         struct jailhouse_pci_capability pci_caps[6];
  27 } __attribute__((packed)) config = {
  28         .cell = {
  29                 .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
  30                 .revision = JAILHOUSE_CONFIG_REVISION,
  31                 .name = "linux-x86-demo",
  32                 .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
  33                          JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
  34
  35                 .cpu_set_size = sizeof(config.cpus),
  36                 .num_memory_regions = ARRAY_SIZE(config.mem_regions),
  37                 .num_cache_regions = ARRAY_SIZE(config.cache_regions),
  38                 .num_irqchips = ARRAY_SIZE(config.irqchips),
  39                 .num_pio_regions = ARRAY_SIZE(config.pio_regions),
  40                 .num_pci_devices = ARRAY_SIZE(config.pci_devices),
  41                 .num_pci_caps = ARRAY_SIZE(config.pci_caps),
  42         },
  43
  44         .cpus = {
  45                 0b1100,
  46         },
  47
  48         .mem_regions = {
  49                 /* IVSHMEM shared memory region (virtio-blk front) */
  50                 {
  51                         .phys_start = 0x27000000, /* to 0x27001000 */
  52                         .virt_start = 0x27000000,
  53                         .size = 0x1000,
  54                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
  55                 },
  56                 {
  57                         .phys_start = 0x27001000,/* to 0x270e0000 */
  58                         .virt_start = 0x27001000,
  59                         .size = 0xdf000,
  60                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  61                                 JAILHOUSE_MEM_ROOTSHARED,
  62                 },
  63                 { 0 },
  64                 { 0 },
  65                 /* IVSHMEM shared memory region (virtio-con front) */
  66                 {
  67                         .phys_start = 0x270e0000,/* to 0x270e1000 */
  68                         .virt_start = 0x270e0000,
  69                         .size = 0x1000,
  70                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
  71                 },
  72                 {
  73                         .phys_start = 0x270e1000,/*to 0x270f0000 */
  74                         .virt_start = 0x270e1000,
  75                         .size = 0xf000,
  76                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  77                                 JAILHOUSE_MEM_ROOTSHARED,
  78                 },
  79                 { 0 },
  80                 { 0 },
  81                 /* IVSHMEM shared memory regions (demo) */
  82                 {
  83                         .phys_start = 0x270f0000,/*to 0x270f1000 */
  84                         .virt_start = 0x270f0000,
  85                         .size = 0x1000,
  86                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
  87                 },
  88                 {
  89                         .phys_start = 0x270f1000,/*to 0x270fa000 */
  90                         .virt_start = 0x270f1000,
  91                         .size = 0x9000,
  92                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  93                                 JAILHOUSE_MEM_ROOTSHARED,
  94                 },
  95                 {
  96                         .phys_start = 0x270fa000,/* to 0x270fc000 */
  97                         .virt_start = 0x270fa000,
  98                         .size = 0x2000,
  99                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
 100                 },
 101                 {
 102                         .phys_start = 0x270fc000,/* to 0x270fe000*/
 103                         .virt_start = 0x270fc000,
 104                         .size = 0x2000,
 105                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
 106                 },
 107                 {
 108                         .phys_start = 0x270fe000,/* to 0x27100000 */
 109                         .virt_start = 0x270fe000,
 110                         .size = 0x2000,
 111                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 112                                 JAILHOUSE_MEM_ROOTSHARED,
 113                 },
 114                 /* IVSHMEM shared memory regions (networking) */
 115                 JAILHOUSE_SHMEM_NET_REGIONS(0x27100000, 1),
 116                 /* low RAM */ {
 117                         .phys_start = 0x22600000,/* to 0x22700000*/
 118                         .virt_start = 0,
 119                         .size = 0x00100000,
 120                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 121                                 JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
 122                                 JAILHOUSE_MEM_LOADABLE,
 123                 },
 124                 /* communication region */ {
 125                         /*.phys_start = ? */
 126                         .virt_start = 0x00100000,
 127                         .size = 0x00001000,
 128                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 129                                 JAILHOUSE_MEM_COMM_REGION,
 130                 },
 131                 /* high RAM */ {
 132                         .phys_start = 0x22700000,/*to 0x26e00000 */
 133                         .virt_start = 0x00200000,
 134                         .size = 0x4700000,
 135                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 136                                 JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
 137                                 JAILHOUSE_MEM_LOADABLE,
 138                 },
 139         },
 140
 141         .cache_regions = {
 142                 {
 143                         .start = 0,
 144                         .size = 2,
 145                         .type = JAILHOUSE_CACHE_L3,
 146                 },
 147         },
 148
 149         .irqchips = {
 150                 /* IOAPIC */ {
 151                         .address = 0xfec00000,
 152                         .id = 0xff00,
 153                         .pin_bitmap = {
 154                                 (1 << 3) | (1 << 4),
 155                         },
 156                 },
 157         },
 158
 159         .pio_regions = {
 160                 PIO_RANGE(0x2f8, 8), /* serial 2 */
 161 //              PIO_RANGE(0x3f8, 8), /* serial 1 */
 162                 PIO_RANGE(0xe010, 8), /* OXPCIe952 serial1 */
 163         },
 164
 165         .pci_devices = {
 166                 {
 167                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 168                         .domain = 0x0,
 169                         .bdf = 0x0c << 3,
 170                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 171                         .num_msix_vectors = 2,
 172                         .shmem_regions_start = 0,
 173                         .shmem_dev_id = 1,
 174                         .shmem_peers = 2,
 175                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VIRTIO_FRONT +
 176                                 VIRTIO_DEV_BLOCK,
 177                 },
 178                 {
 179                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 180                         .domain = 0x0,
 181                         .bdf = 0x0d << 3,
 182                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 183                         .num_msix_vectors = 3,
 184                         .shmem_regions_start = 4,
 185                         .shmem_dev_id = 1,
 186                         .shmem_peers = 2,
 187                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VIRTIO_FRONT +
 188                                 VIRTIO_DEV_CONSOLE,
 189                 },
 190                 {
 191                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 192                         .domain = 0x0,
 193                         .bdf = 0x0e << 3,
 194                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 195                         .num_msix_vectors = 16,
 196                         .shmem_regions_start = 8,
 197                         .shmem_dev_id = 2,
 198                         .shmem_peers = 3,
 199                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
 200                 },
 201                 {
 202                         .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
 203                         .domain = 0x0,
 204                         .bdf = 0x0f << 3,
 205                         .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
 206                         .num_msix_vectors = 2,
 207                         .shmem_regions_start = 13,
 208                         .shmem_dev_id = 1,
 209                         .shmem_peers = 2,
 210                         .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
 211                 },
 212         },
 213
 214         .pci_caps = {
 215                 {
 216                         .id = PCI_CAP_ID_MSI,
 217                         .start = 0xd0,
 218                         .len = 14,
 219                         .flags = JAILHOUSE_PCICAPS_WRITE,
 220                 },
 221                 {
 222                         .id = PCI_CAP_ID_EXP,
 223                         .start = 0xe0,
 224                         .len = 20,
 225                         .flags = JAILHOUSE_PCICAPS_WRITE,
 226                 },
 227                 {
 228                         .id = PCI_CAP_ID_MSIX,
 229                         .start = 0xa0,
 230                         .len = 12,
 231                         .flags = JAILHOUSE_PCICAPS_WRITE,
 232                 },
 233                 {
 234                         .id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
 235                         .start = 0x100,
 236                         .len = 4,
 237                         .flags = 0,
 238                 },
 239                 {
 240                         .id = PCI_EXT_CAP_ID_DSN | JAILHOUSE_PCI_EXT_CAP,
 241                         .start = 0x140,
 242                         .len = 4,
 243                         .flags = 0,
 244                 },
 245         }
 246 };