meta-agl-bsp/meta-renesas/recipes-kernel/mmngr-module/files/0001-Fix-for-memory-corruption-during-hibernate.patch

   1 From 99f60a25458ac553ff609f5bdbf4db7dade46d9a Mon Sep 17 00:00:00 2001
   2 From: Yuichi Kusakabe <yuichi.kusakabe@jp.fujitsu.com>
   3 Date: Sat, 10 Jun 2017 20:26:26 +0900
   4 Subject: [PATCH] Fix for memory corruption during hibernate
   5
   6 Signed-off-by: Yuichi Kusakabe <yuichi.kusakabe@jp.fujitsu.com>
   7 ---
   8  drv/mmngr_drv.c | 109 ++++++++++++++++++++++++++++++++++++++++++++++++++++++--
   9  1 file changed, 106 insertions(+), 3 deletions(-)
  10
  11 diff --git a/drv/mmngr_drv.c b/drv/mmngr_drv.c
  12 index 797800f..91f6c6e 100755
  13 --- a/drv/mmngr_drv.c
  14 +++ b/drv/mmngr_drv.c
  15 @@ -844,7 +844,7 @@ static struct miscdevice misc = {
  16  extern struct cma *rcar_gen2_dma_contiguous;
  17  #endif
  18
  19 -static int mm_init(void)
  20 +static int mmngr_probe(struct platform_device *pdev)
  21  {
  22         int                     ret = 0;
  23         struct MM_DRVDATA       *p = NULL;
  24 @@ -946,16 +946,16 @@ static int mm_init(void)
  25         printk(KERN_ERR "MMD reserve area from 0x%08x to 0x%08x at physical\n",
  26                 (unsigned int)phy_addr,
  27                 (unsigned int)phy_addr + MM_KERNEL_RESERVE_SIZE - 1);
  28 -#endif
  29  #ifdef MMNGR_IPMMU_ENABLE
  30         r8a779x_ipmmu_startup();
  31         r8a779x_ipmmu_initialize(IPMMUMX_DOMAIN);
  32  #endif
  33 +#endif
  34
  35         return 0;
  36  }
  37
  38 -static void mm_exit(void)
  39 +static int mmngr_remove(struct platform_device *pdev)
  40  {
  41  #ifdef MMNGR_IPMMU_ENABLE
  42         r8a779x_ipmmu_cleanup();
  43 @@ -983,6 +983,109 @@ static void mm_exit(void)
  44  #endif
  45
  46         kfree(mm_drvdata);
  47 +       return 0;
  48 +}
  49 +static int mmngr_suspend(struct device *dev)
  50 +{
  51 +       return 0;
  52 +}
  53 +static int mmngr_resume(struct device *dev)
  54 +{
  55 +       return 0;
  56 +}
  57 +static int mmngr_freeze(struct device *dev)
  58 +{
  59 +#if defined(MMNGR_KOELSCH) || defined(MMNGR_LAGER) || \
  60 +               defined(MMNGR_ALT) || defined(MMNGR_GOSE)
  61 +       iowrite32((~MM_IMPCTR_VAL) & ioread32(top_impctr), top_impctr);
  62 +#endif
  63 +       mm_set_mxi_path(0, 0);
  64 +       dma_free_coherent(mm_drvdata->mm_dev_reserve,
  65 +                       mm_drvdata->reserve_size,
  66 +                       (void *)mm_drvdata->reserve_kernel_virt_addr,
  67 +                       (dma_addr_t)mm_drvdata->reserve_phy_addr);
  68 +       return 0;
  69 +}
  70 +static int mmngr_thaw(struct device *dev)
  71 +{
  72 +       void                    *pkernel_virt_addr;
  73 +       mm_set_mxi_path(MM_OMXBUF_MXI_ADDR,
  74 +               MM_OMXBUF_MXI_ADDR + MM_OMXBUF_SIZE);
  75 +       pkernel_virt_addr = dma_alloc_coherent(mm_drvdata->mm_dev_reserve,
  76 +                               MM_KERNEL_RESERVE_SIZE,
  77 +                               (dma_addr_t *)&mm_drvdata->reserve_phy_addr,
  78 +                               GFP_KERNEL);
  79 +       mm_drvdata->reserve_kernel_virt_addr = (unsigned long)pkernel_virt_addr;
  80 +       return 0;
  81 +}
  82 +static int mmngr_restore(struct device *dev)
  83 +{
  84 +       void                    *pkernel_virt_addr;
  85 +       mm_set_mxi_path(MM_OMXBUF_MXI_ADDR,
  86 +               MM_OMXBUF_MXI_ADDR + MM_OMXBUF_SIZE);
  87 +
  88 +#ifdef MMNGR_KOELSCH
  89 +       if ((MM_PRR_ESMASK & ioread32(top_prr)) >= MM_PRR_ES2) {
  90 +               mm_enable_pmb();
  91 +               mm_set_pmb_area(MM_OMXBUF_ADDR, top_impmba0, top_impmbd0);
  92 +               mm_enable_vpc_utlb();
  93 +       }
  94 +#endif
  95 +#ifdef MMNGR_LAGER
  96 +       if ((MM_PRR_ESMASK & ioread32(top_prr)) >= MM_PRR_ES2) {
  97 +               mm_enable_pmb();
  98 +               mm_set_pmb_area(MM_OMXBUF_ADDR, top_impmba0, top_impmbd0);
  99 +               mm_set_pmb_area(MM_OMXBUF_ADDR + MM_PMB_SIZE_128M,
 100 +                       top_impmba1, top_impmbd1);
 101 +               mm_enable_vpc_utlb();
 102 +       }
 103 +#endif
 104 +#ifdef MMNGR_ALT
 105 +       mm_enable_pmb();
 106 +       mm_set_pmb_area(MM_OMXBUF_ADDR, top_impmba0, top_impmbd0);
 107 +       mm_enable_vpc_utlb();
 108 +#endif
 109 +#ifdef MMNGR_GOSE
 110 +       mm_enable_pmb();
 111 +       mm_set_pmb_area(MM_OMXBUF_ADDR, top_impmba0, top_impmbd0);
 112 +       mm_enable_vpc_utlb();
 113 +#endif
 114 +       pkernel_virt_addr = dma_alloc_coherent(mm_drvdata->mm_dev_reserve,
 115 +                               MM_KERNEL_RESERVE_SIZE,
 116 +                               (dma_addr_t *)&mm_drvdata->reserve_phy_addr,
 117 +                               GFP_KERNEL);
 118 +       mm_drvdata->reserve_kernel_virt_addr = (unsigned long)pkernel_virt_addr;
 119 +
 120 +       return 0;
 121 +}
 122 +static const struct dev_pm_ops mmngr_pm_ops = {
 123 +       SET_SYSTEM_SLEEP_PM_OPS(mmngr_suspend, mmngr_resume)
 124 +       .freeze = mmngr_freeze,
 125 +       .thaw = mmngr_thaw,
 126 +       .restore = mmngr_restore,
 127 +};
 128 +struct platform_driver mmngr_driver = {
 129 +       .probe = mmngr_probe,
 130 +       .remove = mmngr_remove,
 131 +       .driver = {
 132 +               .name = "mmngr",
 133 +               .pm = &mmngr_pm_ops,
 134 +       },
 135 +};
 136 +struct platform_device mmngr_device = {
 137 +       .name = "mmngr",
 138 +       .id = -1,
 139 +};
 140 +static int mm_init(void)
 141 +{
 142 +       platform_driver_register(&mmngr_driver);
 143 +       platform_device_register(&mmngr_device);
 144 +       return 0;
 145 +}
 146 +static void mm_exit(void)
 147 +{
 148 +       platform_device_unregister(&mmngr_device);
 149 +       platform_driver_unregister(&mmngr_driver);
 150  }
 151
 152  module_init(mm_init);
 153 --
 154 1.8.3.1
 155